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NUVOTON > ARM9 Family > N3291 多格式解码系列

    N3291 多格式解码系列

    新唐的N3291多格式视频译码器系列,为主频最高可支持到 300 MHz的ARM926EJ-S应用处理器。N3292系列整合了硬件多格式视频译码器,主要应用为人机界面、智能家电和教育机。N3292支持的解码格式有H.264、MPEG-4、H.263和Sorenson Spark,支持的解析到最高到 800x600。N3291系列提供了内建 32MB和64MB两种内存容量且pin脚兼容的 128-pin LQFP封装。

    Part No. Raw NAND I/F, ECC bits NAND Flash, No. of ECC bits CPU Max Speed I Cache D Cache SRAM Stacked SDRAM (bit) SPI Flash I/F SD / SDIO 1.1 Host (12 Mbps) USB 2.0 Host (480 Mbps) Device (FS / HS) 2D GFX JPEG Codec Video Codec RGB Color (bits) Max. Resolution SAR ADC 24-bit Σ-Δ ADC ADC for MIC Input Touch Panel (Wire) Stereo DAC (bits) JTAG Ethernet 10/100 MAC CMOS Sensor1 GPIO (Max) UART I2C SPI RTC PWM TV Output I2S Core Voltage (V) I/O Voltage (V) Package Status I/O I2S/ AC97 ADC Operating Temp. Range (°C ) SDRAM NOR Flash SPI Flash, No. of I/O Pins ATAPI USB 2.0 HS Device 2D Graphics TFT LCD Speed (Samples per second) Touch Screen Controller LVD/LVR External Bus Interface KPI PS2 PCI Master
    N32915U3DN 24   926 300 MHz 16K 16K 8K 16Mx16 DDR2 Y 3(one hardware host controller) 1   HS BitBLT Y Multi-Format Decoder MJPEG Codec 24 SVGA(800x600) Y   Y 4 16 Y   Y(CCIR601 / CCIR656 I/F, 2M pixel) 89 2 1 2(Only one hardware SPI controller to support two SPI device with two chip selection signals) Y 4 Y Y 1.2 3.3 LQFP-128 (MCP) Mass Production                                    
    N32916U1DN 24   926 300 MHz 16K 16K 8K 32Mx16 DDR2 Y 3(one hardware host controller) 1   HS BitBLT Y Multi-Format Decoder MJPEG Codec 24 SVGA(800x600) Y   Y 4 16 Y   Y(CCIR601 / CCIR656 I/F, 2M pixel) 89 2 1 2(Only one hardware SPI controller to support two SPI device with two chip selection signals) Y 4 Y Y 1.2 3.3 LQFP-128 (MCP) Mass Production                                    
    N32916U2DN 24   926 300 MHz 16K 16K 8K 32Mx16 DDR2 Y 3(one hardware host controller) 1   HS OVG(Khronos OpenVG 1.1-compliant IP) Y Multi-Format Decoder MJPEG Codec 24 SVGA(800x600) Y   Y 4 16 Y   Y(CCIR601 / CCIR656 I/F, 2M pixel) 89 2 1 2(Only one hardware SPI controller to support two SPI device with two chip selection signals) Y 4 Y Y 1.2 3.3 LQFP-128 (MCP) Mass Production